From: Sergei Shtylyov <sshtylyov@ru•mvista.com>
To: Segher Boessenkool <segher@kernel•crashing.org>
Cc: linuxppc-dev@ozlabs•org, John Linn <john.linn@xilinx•com>
Subject: Re: [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart 16550.
Date: Fri, 21 Mar 2008 20:01:04 +0300 [thread overview]
Message-ID: <47E3E9D0.60105@ru.mvista.com> (raw)
In-Reply-To: <0a442bfb97492bd8d687678480c6217a@kernel.crashing.org>
Segher Boessenkool wrote:
>> The proposed use clearly would treat them as generic, since in the
>> context of the Xilinx UART they're just not needed -- it's known
>> beforehand and most probably fixed how/where the registers are mapped.
>> There's just no need for such info in the device tree -- unless you're
>> going to teach the *generic* driver to handle this specific (and
>> possibly others alike) kind of a device.
> I was under the impression that the "xilinx uart" was just a 16550 (or so)
> with its registers wired up in a slightly unusual way. If it's a
> completely
> different device, of course you need a separate binding, and you might not
> want reg-shift properties etc. there.
It seems to be 16550 in the core, although coming in many flavors. :-)
>>> "reg-*" has nothing to do with Linux device driver implementation
>>> issues: it describes how a device is physically wired up!
>> Hm... wasn't that you who were telling that use of "range"
>> properties guarantees 1:1 correspondence of the upstream/downstream
>> bus addresses (in their LSB part of course -- meaning that the device
>> registers 0..x are seen by the CPU at addresses base+0..base+X?
> I have no idea what "ranges" has to do with this.
Me neither. :-)
> This device is not a memory-mapped bus, it's a UART.
IIRC, we were discussing MTD then, with an imaginary (for PPC) case of it
being reverse-endian (actually happened on other archs)... IMHO, how the child
bus addresses correspond to parent's one 1:1, doesn't imply that you can't
have a device wired to the child bus a strange way, e.g. with byte-enables
"reversed"...
>>>>> In support of my argument; the fact that you need a table of data says
>>>>> to me that this data should really be encoded in the device tree. :-)
>>>> Not at all.
>>> Not _necessarily_. I agree with Grant here: for many of these devices
>>> with byte-size registers, it is very common to find them with their
>>> register banks wired up differently, and that is often the *only*
>>> difference to the "normal" device. In this situation, it makes a lot
>>> of sense to describe that difference with "reg-*" properties.
>> Note that "compicated" mapping is not (necessarily) a property of
>> the device itself but generally a property of the chip select circuit,
>> i.e. external entity.
> There is no difference insofar as the device tree is concerned.
OK...
> Segher
WBR, Sergei
next prev parent reply other threads:[~2008-03-21 16:59 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <12060242324116-git-send-email-john.linn@xilinx.com>
2008-03-20 14:43 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart 16550 John Linn
2008-03-21 0:19 ` Grant Likely
2008-03-21 9:21 ` Paul Mackerras
2008-03-21 11:39 ` Segher Boessenkool
2008-03-21 16:08 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart16550 Stephen Neuendorffer
2008-03-21 16:48 ` Segher Boessenkool
2008-03-22 14:50 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart 16550 Grant Likely
2008-03-22 16:06 ` Sergei Shtylyov
2008-03-24 14:09 ` Sergei Shtylyov
2008-03-24 14:27 ` Grant Likely
2008-03-24 16:15 ` Sergei Shtylyov
2008-03-24 16:48 ` Grant Likely
2008-03-24 17:03 ` Sergei Shtylyov
2008-03-25 22:48 ` John Linn
2008-03-21 13:00 ` Sergei Shtylyov
2008-03-21 15:37 ` Segher Boessenkool
2008-03-21 15:54 ` Sergei Shtylyov
2008-03-21 16:45 ` Segher Boessenkool
2008-03-21 16:50 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart16550 Stephen Neuendorffer
2008-03-21 17:01 ` Sergei Shtylyov [this message]
2008-03-22 15:06 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart 16550 Grant Likely
2008-03-22 16:40 ` Sergei Shtylyov
2008-03-21 16:14 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart16550 Stephen Neuendorffer
[not found] ` <1206024232655-git-send-email-john.linn@xilinx.com>
2008-03-20 14:43 ` [PATCH 3/3] [POWERPC] Xilinx: boot support for Xilinx uart 16550 John Linn
2008-03-20 14:54 ` Grant Likely
2008-03-20 16:15 ` John Linn
2008-03-20 21:18 ` Grant Likely
[not found] ` <20080320175601.5D86217C8055@mail127-sin.bigfish.com>
2008-03-20 21:07 ` Grant Likely
2008-03-20 22:04 ` Grant Likely
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