From: Sergei Shtylyov <sshtylyov@ru•mvista.com>
To: Grant Likely <grant.likely@secretlab•ca>
Cc: linuxppc-dev@ozlabs•org, Paul Mackerras <paulus@samba•org>,
John Linn <john.linn@xilinx•com>
Subject: Re: [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart 16550.
Date: Sat, 22 Mar 2008 19:06:00 +0300 [thread overview]
Message-ID: <47E52E68.60503@ru.mvista.com> (raw)
In-Reply-To: <fa686aa40803220750h1d86589am9a26aeeb359178b7@mail.gmail.com>
Grant Likely wrote:
>> > Personally, I'm not fond of this approach. There is already some
>> > traction to using the reg-shift property to specify spacing, and I
>> > think it would be appropriate to also define a reg-offset property to
>> > handle the +3 offset and then let the xilinx 16550 nodes use those.
>> Why do we need a reg-offset property when we can just add the offset
>> to the appropriate word(s) in the reg property?
> Primarily because the device creates 32 byte registers starting at 0;
> but they are also big-endian byte accessible so a byte read at offset
> 8 also works. reg-offset seems to be a better description of the
> hardware to me.
Ugh... I was just going is it possible to access the chip registers as
32-bit entities, and employ UPIO_MEM32 mode of 8250.c -- just to avoid that
reg-offset wart. Now you're telling everybody that it's completely
superfluous... :-)
> Cheers,
> g.
WBR, Sergei
next prev parent reply other threads:[~2008-03-22 16:04 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <12060242324116-git-send-email-john.linn@xilinx.com>
2008-03-20 14:43 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart 16550 John Linn
2008-03-21 0:19 ` Grant Likely
2008-03-21 9:21 ` Paul Mackerras
2008-03-21 11:39 ` Segher Boessenkool
2008-03-21 16:08 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart16550 Stephen Neuendorffer
2008-03-21 16:48 ` Segher Boessenkool
2008-03-22 14:50 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart 16550 Grant Likely
2008-03-22 16:06 ` Sergei Shtylyov [this message]
2008-03-24 14:09 ` Sergei Shtylyov
2008-03-24 14:27 ` Grant Likely
2008-03-24 16:15 ` Sergei Shtylyov
2008-03-24 16:48 ` Grant Likely
2008-03-24 17:03 ` Sergei Shtylyov
2008-03-25 22:48 ` John Linn
2008-03-21 13:00 ` Sergei Shtylyov
2008-03-21 15:37 ` Segher Boessenkool
2008-03-21 15:54 ` Sergei Shtylyov
2008-03-21 16:45 ` Segher Boessenkool
2008-03-21 16:50 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart16550 Stephen Neuendorffer
2008-03-21 17:01 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart 16550 Sergei Shtylyov
2008-03-22 15:06 ` Grant Likely
2008-03-22 16:40 ` Sergei Shtylyov
2008-03-21 16:14 ` [PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart16550 Stephen Neuendorffer
[not found] ` <1206024232655-git-send-email-john.linn@xilinx.com>
2008-03-20 14:43 ` [PATCH 3/3] [POWERPC] Xilinx: boot support for Xilinx uart 16550 John Linn
2008-03-20 14:54 ` Grant Likely
2008-03-20 16:15 ` John Linn
2008-03-20 21:18 ` Grant Likely
[not found] ` <20080320175601.5D86217C8055@mail127-sin.bigfish.com>
2008-03-20 21:07 ` Grant Likely
2008-03-20 22:04 ` Grant Likely
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