From: Balbir Singh <bsingharora@gmail•com>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>,
benh@kernel•crashing.org, paulus@samba•org, mpe@ellerman•id.au
Cc: linuxppc-dev@lists•ozlabs.org
Subject: Re: [PATCH V2 18/68] powerpc/mm: Move hash and no hash code to separate files
Date: Mon, 11 Apr 2016 15:14:06 +1000 [thread overview]
Message-ID: <570B329E.8060607@gmail.com> (raw)
In-Reply-To: <1460182444-2468-19-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On 09/04/16 16:13, Aneesh Kumar K.V wrote:
> This patch reduce #ifdef in C code and also help in adding radix changes
> later. Only code movement in this patch.
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux•vnet.ibm.com>
> ---
> arch/powerpc/mm/Makefile | 3 +-
> arch/powerpc/mm/init_64.c | 74 ++--------------------
> arch/powerpc/mm/pgtable-book3e.c | 128 +++++++++++++++++++++++++++++++++++++++
> arch/powerpc/mm/pgtable-hash64.c | 100 ++++++++++++++++++++++++++++++
> arch/powerpc/mm/pgtable_64.c | 83 -------------------------
> 5 files changed, 235 insertions(+), 153 deletions(-)
> create mode 100644 arch/powerpc/mm/pgtable-book3e.c
> create mode 100644 arch/powerpc/mm/pgtable-hash64.c
>
> diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
> index adfee3f1aeb9..ef778997daa9 100644
> --- a/arch/powerpc/mm/Makefile
> +++ b/arch/powerpc/mm/Makefile
> @@ -13,7 +13,8 @@ obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
> tlb_nohash_low.o
> obj-$(CONFIG_PPC_BOOK3E) += tlb_low_$(CONFIG_WORD_SIZE)e.o
> hash64-$(CONFIG_PPC_NATIVE) := hash_native_64.o
> -obj-$(CONFIG_PPC_STD_MMU_64) += hash_utils_64.o slb_low.o slb.o $(hash64-y)
> +obj-$(CONFIG_PPC_BOOK3E_64) += pgtable-book3e.o
> +obj-$(CONFIG_PPC_STD_MMU_64) += pgtable-hash64.o hash_utils_64.o slb_low.o slb.o $(hash64-y)
> obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o hash_low_32.o
> obj-$(CONFIG_PPC_STD_MMU) += tlb_hash$(CONFIG_WORD_SIZE).o \
> mmu_context_hash$(CONFIG_WORD_SIZE).o
> diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
> index ba655666186d..8d1daf7d9785 100644
> --- a/arch/powerpc/mm/init_64.c
> +++ b/arch/powerpc/mm/init_64.c
> @@ -189,75 +189,6 @@ static int __meminit vmemmap_populated(unsigned long start, int page_size)
> return 0;
> }
>
> -/* On hash-based CPUs, the vmemmap is bolted in the hash table.
> - *
> - * On Book3E CPUs, the vmemmap is currently mapped in the top half of
> - * the vmalloc space using normal page tables, though the size of
> - * pages encoded in the PTEs can be different
> - */
> -
> -#ifdef CONFIG_PPC_BOOK3E
> -static int __meminit vmemmap_create_mapping(unsigned long start,
> - unsigned long page_size,
> - unsigned long phys)
> -{
> - /* Create a PTE encoding without page size */
> - unsigned long i, flags = _PAGE_PRESENT | _PAGE_ACCESSED |
> - _PAGE_KERNEL_RW;
> -
> - /* PTEs only contain page size encodings up to 32M */
> - BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].enc > 0xf);
> -
> - /* Encode the size in the PTE */
> - flags |= mmu_psize_defs[mmu_vmemmap_psize].enc << 8;
> -
> - /* For each PTE for that area, map things. Note that we don't
> - * increment phys because all PTEs are of the large size and
> - * thus must have the low bits clear
> - */
> - for (i = 0; i < page_size; i += PAGE_SIZE)
> - BUG_ON(map_kernel_page(start + i, phys, flags));
> -
> - return 0;
> -}
> -
> -#ifdef CONFIG_MEMORY_HOTPLUG
> -static void vmemmap_remove_mapping(unsigned long start,
> - unsigned long page_size)
> -{
> -}
> -#endif
> -#else /* CONFIG_PPC_BOOK3E */
> -static int __meminit vmemmap_create_mapping(unsigned long start,
> - unsigned long page_size,
> - unsigned long phys)
> -{
> - int rc = htab_bolt_mapping(start, start + page_size, phys,
> - pgprot_val(PAGE_KERNEL),
> - mmu_vmemmap_psize, mmu_kernel_ssize);
> - if (rc < 0) {
> - int rc2 = htab_remove_mapping(start, start + page_size,
> - mmu_vmemmap_psize,
> - mmu_kernel_ssize);
> - BUG_ON(rc2 && (rc2 != -ENOENT));
> - }
> - return rc;
> -}
> -
> -#ifdef CONFIG_MEMORY_HOTPLUG
> -static void vmemmap_remove_mapping(unsigned long start,
> - unsigned long page_size)
> -{
> - int rc = htab_remove_mapping(start, start + page_size,
> - mmu_vmemmap_psize,
> - mmu_kernel_ssize);
> - BUG_ON((rc < 0) && (rc != -ENOENT));
> - WARN_ON(rc == -ENOENT);
> -}
> -#endif
> -
> -#endif /* CONFIG_PPC_BOOK3E */
> -
> struct vmemmap_backing *vmemmap_list;
> static struct vmemmap_backing *next;
> static int num_left;
> @@ -309,6 +240,9 @@ static __meminit void vmemmap_list_populate(unsigned long phys,
> vmemmap_list = vmem_back;
> }
>
> +extern int __meminit vmemmap_create_mapping(unsigned long start,
> + unsigned long page_size,
> + unsigned long phys);
> int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
> {
> unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift;
> @@ -347,6 +281,8 @@ int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
> }
>
> #ifdef CONFIG_MEMORY_HOTPLUG
> +extern void vmemmap_remove_mapping(unsigned long start,
> + unsigned long page_size);
> static unsigned long vmemmap_list_free(unsigned long start)
> {
> struct vmemmap_backing *vmem_back, *vmem_back_prev;
> diff --git a/arch/powerpc/mm/pgtable-book3e.c b/arch/powerpc/mm/pgtable-book3e.c
> new file mode 100644
> index 000000000000..f75ba4142875
> --- /dev/null
> +++ b/arch/powerpc/mm/pgtable-book3e.c
> @@ -0,0 +1,128 @@
> +
> +/*
> + * Copyright IBM Corporation, 2015
> + * Author Aneesh Kumar K.V <aneesh.kumar@linux•vnet.ibm.com>
> + *
You may want to retain the copyrights from the original file as well
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of version 2 of the GNU Lesser General Public License
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it would be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
> + *
> + */
> +
> +/*
> + * PPC64 THP Support for hash based MMUs
> + */
> +#include <linux/sched.h>
> +#include <linux/memblock.h>
> +#include <asm/pgalloc.h>
> +#include <asm/tlb.h>
> +#include <asm/dma.h>
> +
> +#include "mmu_decl.h"
> +
> +#ifdef CONFIG_SPARSEMEM_VMEMMAP
> +/*
> + * On Book3E CPUs, the vmemmap is currently mapped in the top half of
> + * the vmalloc space using normal page tables, though the size of
> + * pages encoded in the PTEs can be different
> + */
> +int __meminit vmemmap_create_mapping(unsigned long start,
> + unsigned long page_size,
> + unsigned long phys)
> +{
> + /* Create a PTE encoding without page size */
> + unsigned long i, flags = _PAGE_PRESENT | _PAGE_ACCESSED |
> + _PAGE_KERNEL_RW;
> +
> + /* PTEs only contain page size encodings up to 32M */
> + BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].enc > 0xf);
> +
> + /* Encode the size in the PTE */
> + flags |= mmu_psize_defs[mmu_vmemmap_psize].enc << 8;
> +
> + /* For each PTE for that area, map things. Note that we don't
> + * increment phys because all PTEs are of the large size and
> + * thus must have the low bits clear
> + */
> + for (i = 0; i < page_size; i += PAGE_SIZE)
> + BUG_ON(map_kernel_page(start + i, phys, flags));
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_MEMORY_HOTPLUG
> +void vmemmap_remove_mapping(unsigned long start,
> + unsigned long page_size)
> +{
> +}
> +#endif
> +#endif /* CONFIG_SPARSEMEM_VMEMMAP */
> +
> +static __ref void *early_alloc_pgtable(unsigned long size)
> +{
> + void *pt;
> +
> + pt = __va(memblock_alloc_base(size, size, __pa(MAX_DMA_ADDRESS)));
> + memset(pt, 0, size);
> +
> + return pt;
> +}
> +
> +/*
> + * map_kernel_page currently only called by __ioremap
> + * map_kernel_page adds an entry to the ioremap page table
> + * and adds an entry to the HPT, possibly bolting it
> + */
> +int map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flags)
> +{
> + pgd_t *pgdp;
> + pud_t *pudp;
> + pmd_t *pmdp;
> + pte_t *ptep;
> +
> + if (slab_is_available()) {
> + pgdp = pgd_offset_k(ea);
> + pudp = pud_alloc(&init_mm, pgdp, ea);
> + if (!pudp)
> + return -ENOMEM;
> + pmdp = pmd_alloc(&init_mm, pudp, ea);
> + if (!pmdp)
> + return -ENOMEM;
> + ptep = pte_alloc_kernel(pmdp, ea);
> + if (!ptep)
> + return -ENOMEM;
> + set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
> + __pgprot(flags)));
> + } else {
> + pgdp = pgd_offset_k(ea);
> +#ifndef __PAGETABLE_PUD_FOLDED
> + if (pgd_none(*pgdp)) {
> + pudp = early_alloc_pgtable(PUD_TABLE_SIZE);
> + BUG_ON(pudp == NULL);
> + pgd_populate(&init_mm, pgdp, pudp);
> + }
> +#endif /* !__PAGETABLE_PUD_FOLDED */
> + pudp = pud_offset(pgdp, ea);
> + if (pud_none(*pudp)) {
> + pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);
> + BUG_ON(pmdp == NULL);
> + pud_populate(&init_mm, pudp, pmdp);
> + }
> + pmdp = pmd_offset(pudp, ea);
> + if (!pmd_present(*pmdp)) {
> + ptep = early_alloc_pgtable(PAGE_SIZE);
> + BUG_ON(ptep == NULL);
> + pmd_populate_kernel(&init_mm, pmdp, ptep);
> + }
> + ptep = pte_offset_kernel(pmdp, ea);
> + set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
> + __pgprot(flags)));
> + }
> +
> + smp_wmb();
> + return 0;
> +}
> diff --git a/arch/powerpc/mm/pgtable-hash64.c b/arch/powerpc/mm/pgtable-hash64.c
> new file mode 100644
> index 000000000000..04d6fa12789e
> --- /dev/null
> +++ b/arch/powerpc/mm/pgtable-hash64.c
> @@ -0,0 +1,100 @@
> +/*
> + * Copyright IBM Corporation, 2015
> + * Author Aneesh Kumar K.V <aneesh.kumar@linux•vnet.ibm.com>
> + *
Same as before
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of version 2 of the GNU Lesser General Public License
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it would be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
> + *
> + */
> +
> +/*
> + * PPC64 THP Support for hash based MMUs
> + */
> +#include <linux/sched.h>
> +#include <asm/pgalloc.h>
> +#include <asm/tlb.h>
> +
> +#include "mmu_decl.h"
> +
> +#ifdef CONFIG_SPARSEMEM_VMEMMAP
> +/*
> + * On hash-based CPUs, the vmemmap is bolted in the hash table.
> + *
> + */
> +int __meminit vmemmap_create_mapping(unsigned long start,
> + unsigned long page_size,
> + unsigned long phys)
> +{
> + int rc = htab_bolt_mapping(start, start + page_size, phys,
> + pgprot_val(PAGE_KERNEL),
> + mmu_vmemmap_psize, mmu_kernel_ssize);
> + if (rc < 0) {
> + int rc2 = htab_remove_mapping(start, start + page_size,
> + mmu_vmemmap_psize,
> + mmu_kernel_ssize);
> + BUG_ON(rc2 && (rc2 != -ENOENT));
> + }
> + return rc;
> +}
> +
> +#ifdef CONFIG_MEMORY_HOTPLUG
> +void vmemmap_remove_mapping(unsigned long start,
> + unsigned long page_size)
> +{
> + int rc = htab_remove_mapping(start, start + page_size,
> + mmu_vmemmap_psize,
> + mmu_kernel_ssize);
> + BUG_ON((rc < 0) && (rc != -ENOENT));
> + WARN_ON(rc == -ENOENT);
> +}
> +#endif
> +#endif /* CONFIG_SPARSEMEM_VMEMMAP */
> +
> +/*
> + * map_kernel_page currently only called by __ioremap
> + * map_kernel_page adds an entry to the ioremap page table
> + * and adds an entry to the HPT, possibly bolting it
> + */
> +int map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flags)
> +{
> + pgd_t *pgdp;
> + pud_t *pudp;
> + pmd_t *pmdp;
> + pte_t *ptep;
> +
> + if (slab_is_available()) {
> + pgdp = pgd_offset_k(ea);
> + pudp = pud_alloc(&init_mm, pgdp, ea);
> + if (!pudp)
> + return -ENOMEM;
> + pmdp = pmd_alloc(&init_mm, pudp, ea);
> + if (!pmdp)
> + return -ENOMEM;
> + ptep = pte_alloc_kernel(pmdp, ea);
> + if (!ptep)
> + return -ENOMEM;
> + set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
> + __pgprot(flags)));
> + } else {
> + /*
> + * If the mm subsystem is not fully up, we cannot create a
> + * linux page table entry for this mapping. Simply bolt an
> + * entry in the hardware page table.
> + *
> + */
> + if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
> + mmu_io_psize, mmu_kernel_ssize)) {
> + printk(KERN_ERR "Failed to do bolted mapping IO "
> + "memory at %016lx !\n", pa);
> + return -ENOMEM;
What happens when we do unmap this? I know this code has been around for a while
so its not new
> + }
> + }
> +
> + smp_wmb();
> + return 0;
> +}
> diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
> index 5fff787da17a..d493f62d12eb 100644
> --- a/arch/powerpc/mm/pgtable_64.c
> +++ b/arch/powerpc/mm/pgtable_64.c
> @@ -78,89 +78,6 @@ struct patb_entry *partition_tb;
> #endif
> unsigned long ioremap_bot = IOREMAP_BASE;
>
> -#ifdef CONFIG_PPC_MMU_NOHASH
> -static __ref void *early_alloc_pgtable(unsigned long size)
> -{
> - void *pt;
> -
> - pt = __va(memblock_alloc_base(size, size, __pa(MAX_DMA_ADDRESS)));
> - memset(pt, 0, size);
> -
> - return pt;
> -}
> -#endif /* CONFIG_PPC_MMU_NOHASH */
> -
> -/*
> - * map_kernel_page currently only called by __ioremap
> - * map_kernel_page adds an entry to the ioremap page table
> - * and adds an entry to the HPT, possibly bolting it
> - */
> -int map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flags)
> -{
> - pgd_t *pgdp;
> - pud_t *pudp;
> - pmd_t *pmdp;
> - pte_t *ptep;
> -
> - if (slab_is_available()) {
> - pgdp = pgd_offset_k(ea);
> - pudp = pud_alloc(&init_mm, pgdp, ea);
> - if (!pudp)
> - return -ENOMEM;
> - pmdp = pmd_alloc(&init_mm, pudp, ea);
> - if (!pmdp)
> - return -ENOMEM;
> - ptep = pte_alloc_kernel(pmdp, ea);
> - if (!ptep)
> - return -ENOMEM;
> - set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
> - __pgprot(flags)));
> - } else {
> -#ifdef CONFIG_PPC_MMU_NOHASH
> - pgdp = pgd_offset_k(ea);
> -#ifdef PUD_TABLE_SIZE
> - if (pgd_none(*pgdp)) {
> - pudp = early_alloc_pgtable(PUD_TABLE_SIZE);
> - BUG_ON(pudp == NULL);
> - pgd_populate(&init_mm, pgdp, pudp);
> - }
> -#endif /* PUD_TABLE_SIZE */
> - pudp = pud_offset(pgdp, ea);
> - if (pud_none(*pudp)) {
> - pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);
> - BUG_ON(pmdp == NULL);
> - pud_populate(&init_mm, pudp, pmdp);
> - }
> - pmdp = pmd_offset(pudp, ea);
> - if (!pmd_present(*pmdp)) {
> - ptep = early_alloc_pgtable(PAGE_SIZE);
> - BUG_ON(ptep == NULL);
> - pmd_populate_kernel(&init_mm, pmdp, ptep);
> - }
> - ptep = pte_offset_kernel(pmdp, ea);
> - set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
> - __pgprot(flags)));
> -#else /* CONFIG_PPC_MMU_NOHASH */
> - /*
> - * If the mm subsystem is not fully up, we cannot create a
> - * linux page table entry for this mapping. Simply bolt an
> - * entry in the hardware page table.
> - *
> - */
> - if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
> - mmu_io_psize, mmu_kernel_ssize)) {
> - printk(KERN_ERR "Failed to do bolted mapping IO "
> - "memory at %016lx !\n", pa);
> - return -ENOMEM;
> - }
> -#endif /* !CONFIG_PPC_MMU_NOHASH */
> - }
> -
> - smp_wmb();
> - return 0;
> -}
> -
> -
> /**
> * __ioremap_at - Low level function to establish the page tables
> * for an IO mapping
>
Otherwise looks good!
Balbir Singh
next prev parent reply other threads:[~2016-04-11 5:14 UTC|newest]
Thread overview: 139+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-09 6:12 [PATCH V2 00/68] PowerISA 3.0 Radix page table support Aneesh Kumar K.V
2016-04-09 6:12 ` [PATCH V2 01/68] powerpc/cxl: Use REGION_ID instead of opencoding Aneesh Kumar K.V
2016-04-11 0:37 ` Andrew Donnellan
2016-04-13 2:42 ` Aneesh Kumar K.V
2016-04-20 3:03 ` Michael Ellerman
2016-04-20 7:53 ` Aneesh Kumar K.V
2016-04-09 6:12 ` [PATCH V2 02/68] powerpc/mm/nohash: Return correctly from flush_tlb_page Aneesh Kumar K.V
2016-04-20 4:08 ` [V2, " Michael Ellerman
2016-04-20 7:49 ` Aneesh Kumar K.V
2016-04-09 6:12 ` [PATCH V2 03/68] powerpc/mm/nohash: Update non SMP version of flush_tlb_page to handle hugetlb address Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 04/68] powerpc/mm: Use big endian page table for book3s 64 Aneesh Kumar K.V
2016-04-22 11:01 ` Michael Ellerman
2016-04-24 22:29 ` Aneesh Kumar K.V
2016-05-29 11:03 ` Anton Blanchard
2016-05-29 21:27 ` Benjamin Herrenschmidt
2016-05-29 23:08 ` Anton Blanchard
2016-05-30 3:42 ` Michael Ellerman
2016-05-30 5:31 ` Anton Blanchard
2016-05-30 8:42 ` Aneesh Kumar K.V
2016-05-30 11:00 ` Benjamin Herrenschmidt
2016-05-30 14:48 ` Aneesh Kumar K.V
2016-05-30 14:59 ` Segher Boessenkool
2016-04-09 6:13 ` [PATCH V2 05/68] powerpc/mm: use _PAGE_READ to indicate Read access Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 06/68] powerpc/mm/subpage: Clear RWX bit to indicate no access Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 07/68] powerpc/mm: Use pte_user instead of opencoding Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 08/68] powerpc/mm: Replace _PAGE_USER with _PAGE_PRIVILEGED Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 09/68] powerpc/mm: Remove RPN_SHIFT and RPN_SIZE Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 10/68] powerpc/mm: Update _PAGE_KERNEL_RO Aneesh Kumar K.V
2016-11-20 0:43 ` [V2,10/68] " Geoff Levand
2016-11-20 18:03 ` Aneesh Kumar K.V
2016-11-21 0:33 ` Geoff Levand
2016-11-23 10:41 ` Aneesh Kumar K.V
2016-11-24 4:04 ` Geoff Levand
2016-04-09 6:13 ` [PATCH V2 11/68] powerpc/mm: Use helper for finding pte bits mapping I/O area Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 12/68] powerpc/mm: Drop WIMG in favour of new constants Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 13/68] powerpc/mm: Use generic version of pmdp_clear_flush_young Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 14/68] powerpc/mm: Use generic version of ptep_clear_flush_young Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 15/68] powerpc/mm: Move common data structure between radix and hash to book3s 64 generic headers Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 16/68] powerpc/mm/power9: Add partition table format Aneesh Kumar K.V
2016-04-11 0:59 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 17/68] powerpc/mm/hash: Add support for POWER9 hash Aneesh Kumar K.V
2016-04-11 4:55 ` Balbir Singh
2016-04-16 19:06 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 18/68] powerpc/mm: Move hash and no hash code to separate files Aneesh Kumar K.V
2016-04-11 5:14 ` Balbir Singh [this message]
2016-04-17 10:20 ` Aneesh Kumar K.V
2016-04-20 6:17 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 19/68] powerpc/mm/book3s: Rename hash specific PTE bits to carry H_ prefix Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 20/68] powerpc/mm: Handle _PTE_NONE_MASK Aneesh Kumar K.V
2016-04-11 6:09 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 21/68] powerpc/mm: Move common pte bits and accessors to book3s/64/pgtable.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 22/68] powerpc/mm: Move pte accessors that operate on common pte bits to pgtable.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 23/68] powerpc/mm: Make page table size a variable Aneesh Kumar K.V
2016-04-12 1:49 ` Balbir Singh
2016-04-17 10:27 ` Aneesh Kumar K.V
2016-04-20 6:21 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 24/68] powerpc/mm: Move page table index and and vaddr to pgtable.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 25/68] powerpc/mm: Move pte related function together Aneesh Kumar K.V
2016-04-14 6:50 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 26/68] powerpc/mm/radix: Add radix pte defines Aneesh Kumar K.V
2016-04-21 4:12 ` Balbir Singh
2016-04-23 8:30 ` Benjamin Herrenschmidt
2016-04-26 1:40 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 27/68] powerpc/mm/radix: Dummy radix_enabled() Aneesh Kumar K.V
2016-04-21 4:27 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 28/68] powerpc/mm: Add radix callbacks to pte accessors Aneesh Kumar K.V
2016-04-21 4:30 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 29/68] powerpc/mm: Move hugetlb and THP related pmd accessors to pgtable.h Aneesh Kumar K.V
2016-04-21 9:53 ` Balbir Singh
2016-04-21 9:59 ` Michael Ellerman
2016-04-21 11:42 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 30/68] powerpc/mm/radix: Add radix callback for pmd accessors Aneesh Kumar K.V
2016-04-21 11:39 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 31/68] powerpc/mm: Abstraction for early init routines Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 32/68] powerpc/mm/radix: Add radix callback " Aneesh Kumar K.V
2016-04-21 12:22 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 33/68] powerpc/mm: Abstraction for vmemmap and map_kernel_page Aneesh Kumar K.V
2016-04-21 12:59 ` Balbir Singh
2016-04-28 6:17 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 34/68] powerpc/mm/radix: Add radix callback for vmemmap and map_kernel page Aneesh Kumar K.V
2016-04-21 13:46 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 35/68] powerpc/mm: Abstraction for switch_mmu_context Aneesh Kumar K.V
2016-04-21 14:12 ` Balbir Singh
2016-04-28 6:13 ` Aneesh Kumar K.V
2016-04-28 6:13 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 36/68] powerpc/mm/radix: Add mmu context handling callback for radix Aneesh Kumar K.V
2016-04-22 6:19 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 37/68] powerpc/mm: Rename mmu_context_hash64.c to mmu_context_book3s64.c Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 38/68] powerpc/mm: Hash linux abstraction for tlbflush routines Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 39/68] powerpc/mm/radix: Add " Aneesh Kumar K.V
2016-04-22 7:20 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 40/68] powerpc/mm/radix: Add MMU_FTR_RADIX Aneesh Kumar K.V
2016-04-22 7:23 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 41/68] powerpc/mm/radix: Use STD_MMU_64 to properly isolate hash related code Aneesh Kumar K.V
2016-04-22 7:32 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 42/68] powerpc/mm/radix: Isolate hash table function from pseries guest code Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 43/68] powerpc/mm/radix: Add checks in slice code to catch radix usage Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 44/68] powerpc/mm/radix: Limit paca allocation in radix Aneesh Kumar K.V
2016-04-22 8:07 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 45/68] powerpc/mm/radix: Pick the address layout for radix config Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 46/68] powerpc/mm/radix: Update secondary PTCR Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 47/68] powerpc/mm: Make a copy of pgalloc.h for 32 and 64 book3s Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 48/68] powerpc/mm: Copy pgalloc (part 2) Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 49/68] powerpc/mm: Revert changes made to nohash pgalloc-64.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 50/68] powerpc/mm: Simplify the code dropping 4 level table #ifdef Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 51/68] powerpc/mm: Rename function to indicate we are allocating fragments Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 52/68] powerpc/mm: make 4k and 64k use pte_t for pgtable_t Aneesh Kumar K.V
2016-04-26 2:58 ` Balbir Singh
2016-04-28 6:03 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 53/68] powerpc/mm: Add radix pgalloc details Aneesh Kumar K.V
2016-04-26 3:05 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 54/68] powerpc/mm: Update pte filter for radix Aneesh Kumar K.V
2016-04-26 3:06 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 55/68] powerpc/mm: VMALLOC abstraction Aneesh Kumar K.V
2016-04-22 6:52 ` Michael Neuling
2016-04-23 3:29 ` Aneesh Kumar K.V
2016-04-26 6:20 ` Balbir Singh
2016-04-26 4:47 ` Balbir Singh
2016-04-28 6:09 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 56/68] powerpc/radix: update mmu cache Aneesh Kumar K.V
2016-04-26 6:23 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 57/68] powerpc/mm: pte_frag abstraction Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 58/68] powerpc/mm: Fix vma_mmu_pagesize for radix Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 59/68] powerpc/mm: Add radix support for hugetlb Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 60/68] powerpc/mm/radix: Make sure swapper pgdir is properly aligned Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 61/68] powerpc/mm/radix: Add hugetlb support 4K page size Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 62/68] powerpc/mm: Drop PTE_ATOMIC_UPDATES from pmd_hugepage_update Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 63/68] powerpc/mm: THP is only available on hash64 as of now Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 64/68] powerpc/mm/thp: Abstraction for THP functions Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 65/68] powerpc/mm/radix: Add radix THP callbacks Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 66/68] powerpc/mm/radix: Add THP support for 4k linux page size Aneesh Kumar K.V
2016-04-28 4:56 ` [V2, " Michael Ellerman
2016-04-28 6:28 ` Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 67/68] powerpc/mm/radix: Cputable update for radix Aneesh Kumar K.V
2016-04-28 14:10 ` [V2,67/68] " Michael Ellerman
2016-04-09 6:14 ` [PATCH V2 68/68] powerpc/mm/radix: Use firmware feature to disable radix Aneesh Kumar K.V
2016-04-20 2:59 ` [V2, " Michael Ellerman
2016-04-20 8:21 ` Aneesh Kumar K.V
2016-04-20 11:25 ` Michael Neuling
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