From: Balbir Singh <bsingharora@gmail•com>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>,
benh@kernel•crashing.org, paulus@samba•org, mpe@ellerman•id.au
Cc: linuxppc-dev@lists•ozlabs.org
Subject: Re: [PATCH V2 32/68] powerpc/mm/radix: Add radix callback for early init routines
Date: Thu, 21 Apr 2016 22:22:59 +1000 [thread overview]
Message-ID: <5718C623.8030401@gmail.com> (raw)
In-Reply-To: <1460182444-2468-33-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On 09/04/16 16:13, Aneesh Kumar K.V wrote:
> This add routines for early setup w.r.t radix. We use device tree
> property ibm,processor-radix-AP-encodings to find supported page sizes.
> If we don't find above we consider 64K and 4K as supported page sizes.
>
> We do map vmemap using 2M page size if we can. Linear mapping is done
> such that we use required page size for that range. For ex: memory of
> 3.5G is mapped such that we use 1G mapping till 3G range and use 2M
> mapping for the rest.
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux•vnet.ibm.com>
> ---
> arch/powerpc/include/asm/book3s/64/mmu.h | 17 +-
> arch/powerpc/include/asm/book3s/64/radix.h | 2 +
> arch/powerpc/mm/Makefile | 1 +
> arch/powerpc/mm/pgtable-radix.c | 344 +++++++++++++++++++++++++++++
> arch/powerpc/platforms/powernv/setup.c | 5 +-
> 5 files changed, 367 insertions(+), 2 deletions(-)
> create mode 100644 arch/powerpc/mm/pgtable-radix.c
>
> diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
> index a66cd3e65a33..a526642f1c02 100644
> --- a/arch/powerpc/include/asm/book3s/64/mmu.h
> +++ b/arch/powerpc/include/asm/book3s/64/mmu.h
> @@ -16,7 +16,10 @@ struct mmu_psize_def {
> int penc[MMU_PAGE_COUNT]; /* HPTE encoding */
> unsigned int tlbiel; /* tlbiel supported for that page size */
> unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
> - unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
> + union {
> + unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
> + unsigned long ap; /* Ap encoding used by PowerISA 3.0 */
> + };
> };
> extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
>
> @@ -98,22 +101,34 @@ extern int mmu_vmemmap_psize;
> extern int mmu_io_psize;
>
> /* MMU initialization */
> +extern void radix_init_native(void);
> extern void hlearly_init_mmu(void);
> +extern void rearly_init_mmu(void);
> static inline void early_init_mmu(void)
> {
> + if (radix_enabled())
> + return rearly_init_mmu();
rearly sounds like rear-ly, r_early_init_mmu()?
> return hlearly_init_mmu();
> }
> extern void hlearly_init_mmu_secondary(void);
> +extern void rearly_init_mmu_secondary(void);
> static inline void early_init_mmu_secondary(void)
> {
> + if (radix_enabled())
> + return rearly_init_mmu_secondary();
> return hlearly_init_mmu_secondary();
> }
>
> extern void hlsetup_initial_memory_limit(phys_addr_t first_memblock_base,
> phys_addr_t first_memblock_size);
> +extern void rsetup_initial_memory_limit(phys_addr_t first_memblock_base,
> + phys_addr_t first_memblock_size);
> static inline void setup_initial_memory_limit(phys_addr_t first_memblock_base,
> phys_addr_t first_memblock_size)
> {
> + if (radix_enabled())
> + return rsetup_initial_memory_limit(first_memblock_base,
> + first_memblock_size);
> return hlsetup_initial_memory_limit(first_memblock_base,
> first_memblock_size);
> }
> diff --git a/arch/powerpc/include/asm/book3s/64/radix.h b/arch/powerpc/include/asm/book3s/64/radix.h
> index 46a5381324f5..806dc2195f85 100644
> --- a/arch/powerpc/include/asm/book3s/64/radix.h
> +++ b/arch/powerpc/include/asm/book3s/64/radix.h
> @@ -133,5 +133,7 @@ static inline int rpmd_trans_huge(pmd_t pmd)
>
> #endif
>
> +extern int map_radix_kernel_page(unsigned long ea, unsigned long pa,
> + pgprot_t flags, unsigned int psz);
> #endif /* __ASSEMBLY__ */
> #endif
> diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
> index ef778997daa9..d734934cbb1e 100644
> --- a/arch/powerpc/mm/Makefile
> +++ b/arch/powerpc/mm/Makefile
> @@ -15,6 +15,7 @@ obj-$(CONFIG_PPC_BOOK3E) += tlb_low_$(CONFIG_WORD_SIZE)e.o
> hash64-$(CONFIG_PPC_NATIVE) := hash_native_64.o
> obj-$(CONFIG_PPC_BOOK3E_64) += pgtable-book3e.o
> obj-$(CONFIG_PPC_STD_MMU_64) += pgtable-hash64.o hash_utils_64.o slb_low.o slb.o $(hash64-y)
> +obj-$(CONFIG_PPC_RADIX_MMU) += pgtable-radix.o
> obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o hash_low_32.o
> obj-$(CONFIG_PPC_STD_MMU) += tlb_hash$(CONFIG_WORD_SIZE).o \
> mmu_context_hash$(CONFIG_WORD_SIZE).o
> diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
> new file mode 100644
> index 000000000000..5737769469b3
> --- /dev/null
> +++ b/arch/powerpc/mm/pgtable-radix.c
> @@ -0,0 +1,344 @@
> +/*
> + * page table handling routines for radix page table
> + *
> + * Copyright (C) 2015 Aneesh Kumar K.V <aneesh.kumar@linux•vnet.ibm.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + *
> + */
> +#include <linux/sched.h>
> +#include <linux/memblock.h>
> +#include <linux/of_fdt.h>
> +
> +#include <asm/pgtable.h>
> +#include <asm/pgalloc.h>
> +#include <asm/dma.h>
> +#include <asm/machdep.h>
> +#include <asm/mmu.h>
> +#include <asm/firmware.h>
> +
> +static int native_update_partition_table(u64 patb1)
> +{
> + partition_tb->patb1 = cpu_to_be64(patb1);
> + return 0;
> +}
> +
> +static __ref void *early_alloc_pgtable(unsigned long size)
> +{
> + void *pt;
> +
> + pt = __va(memblock_alloc_base(size, size, MEMBLOCK_ALLOC_ANYWHERE));
> + memset(pt, 0, size);
> +
> + return pt;
> +}
> +
> +int map_radix_kernel_page(unsigned long ea, unsigned long pa,
> + pgprot_t flags,
> + unsigned int map_page_size)
> +{
> + pgd_t *pgdp;
> + pud_t *pudp;
> + pmd_t *pmdp;
> + pte_t *ptep;
> + /*
> + * Make sure task size is correct as per the max adddr
> + */
> + BUILD_BUG_ON(TASK_SIZE_USER64 > R_PGTABLE_RANGE);
> + if (slab_is_available()) {
> + pgdp = pgd_offset_k(ea);
> + pudp = pud_alloc(&init_mm, pgdp, ea);
> + if (!pudp)
> + return -ENOMEM;
> + if (map_page_size == PUD_SIZE) {
> + ptep = (pte_t *)pudp;
> + goto set_the_pte;
> + }
> + pmdp = pmd_alloc(&init_mm, pudp, ea);
> + if (!pmdp)
> + return -ENOMEM;
> + if (map_page_size == PMD_SIZE) {
> + ptep = (pte_t *)pudp;
> + goto set_the_pte;
> + }
> + ptep = pte_alloc_kernel(pmdp, ea);
> + if (!ptep)
> + return -ENOMEM;
> + } else {
> + pgdp = pgd_offset_k(ea);
> + if (pgd_none(*pgdp)) {
> + pudp = early_alloc_pgtable(PUD_TABLE_SIZE);
> + BUG_ON(pudp == NULL);
> + pgd_populate(&init_mm, pgdp, pudp);
> + }
> + pudp = pud_offset(pgdp, ea);
> + if (map_page_size == PUD_SIZE) {
> + ptep = (pte_t *)pudp;
> + goto set_the_pte;
> + }
> + if (pud_none(*pudp)) {
> + pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);
> + BUG_ON(pmdp == NULL);
> + pud_populate(&init_mm, pudp, pmdp);
> + }
> + pmdp = pmd_offset(pudp, ea);
> + if (map_page_size == PMD_SIZE) {
> + ptep = (pte_t *)pudp;
> + goto set_the_pte;
> + }
> + if (!pmd_present(*pmdp)) {
> + ptep = early_alloc_pgtable(PAGE_SIZE);
> + BUG_ON(ptep == NULL);
> + pmd_populate_kernel(&init_mm, pmdp, ptep);
> + }
> + ptep = pte_offset_kernel(pmdp, ea);
> + }
> +
> +set_the_pte:
> + set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT, flags));
> + smp_wmb();
We got ptesync inside set_pte_at, do we need smp_wmb()?
> + return 0;
> +}
> +
> +static void __init radix_init_pgtable(void)
> +{
> + int loop_count;
> + u64 base, end, start_addr;
> + unsigned long rts_field;
> + struct memblock_region *reg;
> + unsigned long linear_page_size;
> +
> + /* We don't support slb for radix */
> + mmu_slb_size = 0;
> + /*
> + * Create the linear mapping, using standard page size for now
> + */
> + loop_count = 0;
I would call this page_size_idx
> + for_each_memblock(memory, reg) {
> +
> + start_addr = reg->base;
> +
> +redo:
> + if (loop_count < 1 && mmu_psize_defs[MMU_PAGE_1G].shift)
> + linear_page_size = PUD_SIZE;
> + else if (loop_count < 2 && mmu_psize_defs[MMU_PAGE_2M].shift)
> + linear_page_size = PMD_SIZE;
> + else
> + linear_page_size = PAGE_SIZE;
> +
> + base = _ALIGN_UP(start_addr, linear_page_size);
> + end = _ALIGN_DOWN(reg->base + reg->size, linear_page_size);
> +
> + pr_info("Mapping range 0x%lx - 0x%lx with 0x%lx\n",
> + (unsigned long)base, (unsigned long)end,
> + linear_page_size);
> +
> + while (base < end) {
> + map_radix_kernel_page((unsigned long)__va(base),
> + base, PAGE_KERNEL_X,
> + linear_page_size);
> + base += linear_page_size;
> + }
> + /*
> + * map the rest using lower page size
> + */
> + if (end < reg->base + reg->size) {
> + start_addr = end;
> + loop_count++;
> + goto redo;
> + }
Can't we do something like nr_count = reg->size / linear_page_size
then map nr_pud_count entries and use nr_remaining = reg->size % linear_page_size
Then repeat by interchaing nr_remaining with nr_count and updating linear_page_size?
> + }
> + /*
> + * Allocate Partition table and process table for the
> + * host.
> + */
> + BUILD_BUG_ON_MSG((PRTB_SIZE_SHIFT > 23), "Process table size too large.");
> + process_tb = early_alloc_pgtable(1UL << PRTB_SIZE_SHIFT);
> + /*
> + * Fill in the process table.
> + * we support 52 bits, hence 52-28 = 24, 11000
> + */
> + rts_field = 3ull << PPC_BITLSHIFT(2);
> + process_tb->prtb0 = cpu_to_be64(rts_field | __pa(init_mm.pgd) | R_PGD_INDEX_SIZE);
> + /*
> + * Fill in the partition table. We are suppose to use effective address
> + * of process table here. But our linear mapping also enable us to use
> + * physical address here.
> + */
> + ppc_md.update_partition_table(__pa(process_tb) | (PRTB_SIZE_SHIFT - 12) | PATB_GR);
Is this for guest radix?
> + pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd);
> +}
> +
> +static void __init radix_init_partition_table(void)
> +{
> + unsigned long rts_field;
> + /*
> + * we support 52 bits, hence 52-28 = 24, 11000
> + */
> + rts_field = 3ull << PPC_BITLSHIFT(2);
> +
> + BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 24), "Partition table size too large.");
> + partition_tb = early_alloc_pgtable(1UL << PATB_SIZE_SHIFT);
> + partition_tb->patb0 = cpu_to_be64(rts_field | __pa(init_mm.pgd) |
> + R_PGD_INDEX_SIZE | PATB_HR);
> + printk("Partition table %p\n", partition_tb);
> +
> + memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE);
> + /*
> + * update partition table control register,
> + * 64 K size.
> + */
> + mtspr(SPRN_PTCR, __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
> +}
> +
> +void __init radix_init_native(void)
> +{
> + ppc_md.update_partition_table = native_update_partition_table;
> +}
> +
> +static int __init get_idx_from_shift(unsigned int shift)
> +{
> + int idx = -1;
> +
> + switch (shift) {
> + case 0xc:
> + idx = MMU_PAGE_4K;
> + break;
> + case 0x10:
> + idx = MMU_PAGE_64K;
> + break;
> + case 0x15:
> + idx = MMU_PAGE_2M;
> + break;
> + case 0x1e:
> + idx = MMU_PAGE_1G;
> + break;
> + }
> + return idx;
> +}
> +
> +static int __init radix_dt_scan_page_sizes(unsigned long node,
> + const char *uname, int depth,
> + void *data)
> +{
> + int size = 0;
Assignment is not required, since we get &size in of_get_flat_dt_prop
> + int shift, idx;
> + unsigned int ap;
> + const __be32 *prop;
> + const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
> +
> + /* We are scanning "cpu" nodes only */
> + if (type == NULL || strcmp(type, "cpu") != 0)
> + return 0;
> +
> + prop = of_get_flat_dt_prop(node, "ibm,processor-radix-AP-encodings", &size);
> + if (!prop)
> + return 0;
> +
> + pr_info("Page sizes from device-tree:\n");
> + for (; size >= 4; size -= 4, ++prop) {
> +
> + struct mmu_psize_def *def;
> +
> + /* top 3 bit is AP encoding */
> + shift = be32_to_cpu(prop[0]) & ~(0xe << 28);
> + ap = be32_to_cpu(prop[0]) >> 29;
Can we get more meaningful names for 4, 0xe, 28, 29?
> + pr_info("Page size sift = %d AP=0x%x\n", shift, ap);
> +
> + idx = get_idx_from_shift(shift);
> + if (idx < 0)
> + continue;
> +
> + def = &mmu_psize_defs[idx];
> + def->shift = shift;
> + def->ap = ap;
> + }
> +
> + /* needed ? */
> + cur_cpu_spec->mmu_features &= ~MMU_FTR_NO_SLBIE_B;
> + return 1;
> +}
> +
> +static void __init radix_init_page_sizes(void)
> +{
> + int rc;
> +
> + /*
> + * Try to find the available page sizes in the device-tree
> + */
> + rc = of_scan_flat_dt(radix_dt_scan_page_sizes, NULL);
> + if (rc != 0) /* Found */
> + goto found;
> + /*
> + * let's assume we have page 4k and 64k support
> + */
> + mmu_psize_defs[MMU_PAGE_4K].shift = 12;
> + mmu_psize_defs[MMU_PAGE_4K].ap = 0x0;
> +
> + mmu_psize_defs[MMU_PAGE_64K].shift = 16;
> + mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
> +found:
> +#ifdef CONFIG_SPARSEMEM_VMEMMAP
> + if (mmu_psize_defs[MMU_PAGE_2M].shift) {
> + /*
> + * map vmemmap using 2M if available
> + */
> + mmu_vmemmap_psize = MMU_PAGE_2M;
Good idea!
> + }
> +#endif /* CONFIG_SPARSEMEM_VMEMMAP */
> + return;
> +}
> +
> +void __init rearly_init_mmu(void)
> +{
> +#ifdef CONFIG_PPC_64K_PAGES
> + /* PAGE_SIZE mappings */
> + mmu_virtual_psize = MMU_PAGE_64K;
> +#else
> + mmu_virtual_psize = MMU_PAGE_4K;
> +#endif
> +
> +#ifdef CONFIG_SPARSEMEM_VMEMMAP
> + /* vmemmap mapping */
> + mmu_vmemmap_psize = mmu_virtual_psize;
> +#endif
> + /*
> + * initialize page table size
> + */
> + __pte_index_size = R_PTE_INDEX_SIZE;
> + __pmd_index_size = R_PMD_INDEX_SIZE;
> + __pud_index_size = R_PUD_INDEX_SIZE;
> + __pgd_index_size = R_PGD_INDEX_SIZE;
> + __pmd_cache_index = R_PMD_INDEX_SIZE;
> + __pte_table_size = R_PTE_TABLE_SIZE;
> + __pmd_table_size = R_PMD_TABLE_SIZE;
> + __pud_table_size = R_PUD_TABLE_SIZE;
> + __pgd_table_size = R_PGD_TABLE_SIZE;
> +
> + radix_init_page_sizes();
> +
> + if (!firmware_has_feature(FW_FEATURE_LPAR))
> + radix_init_partition_table();
> +
> + radix_init_pgtable();
> +}
> +
> +void rearly_init_mmu_secondary(void)
> +{
> + /*
> + * update partition table control register, 64 K size.
> + */
> + if (!firmware_has_feature(FW_FEATURE_LPAR))
> + mtspr(SPRN_PTCR,
> + __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
> +}
> +
> +void rsetup_initial_memory_limit(phys_addr_t first_memblock_base,
> + phys_addr_t first_memblock_size)
> +{
> + /* Finally limit subsequent allocations */
> + memblock_set_current_limit(first_memblock_base + first_memblock_size);
> +}
> diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
> index 1acb0c72d923..ee6430bedcc3 100644
> --- a/arch/powerpc/platforms/powernv/setup.c
> +++ b/arch/powerpc/platforms/powernv/setup.c
> @@ -273,7 +273,10 @@ static int __init pnv_probe(void)
> if (!of_flat_dt_is_compatible(root, "ibm,powernv"))
> return 0;
>
> - hpte_init_native();
> + if (IS_ENABLED(CONFIG_PPC_RADIX_MMU) && radix_enabled())
> + radix_init_native();
> + else if (IS_ENABLED(CONFIG_PPC_STD_MMU_64))
> + hpte_init_native();
>
> if (firmware_has_feature(FW_FEATURE_OPAL))
> pnv_setup_machdep_opal();
>
This looks good!
Balbir Singh.
next prev parent reply other threads:[~2016-04-21 12:23 UTC|newest]
Thread overview: 139+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-09 6:12 [PATCH V2 00/68] PowerISA 3.0 Radix page table support Aneesh Kumar K.V
2016-04-09 6:12 ` [PATCH V2 01/68] powerpc/cxl: Use REGION_ID instead of opencoding Aneesh Kumar K.V
2016-04-11 0:37 ` Andrew Donnellan
2016-04-13 2:42 ` Aneesh Kumar K.V
2016-04-20 3:03 ` Michael Ellerman
2016-04-20 7:53 ` Aneesh Kumar K.V
2016-04-09 6:12 ` [PATCH V2 02/68] powerpc/mm/nohash: Return correctly from flush_tlb_page Aneesh Kumar K.V
2016-04-20 4:08 ` [V2, " Michael Ellerman
2016-04-20 7:49 ` Aneesh Kumar K.V
2016-04-09 6:12 ` [PATCH V2 03/68] powerpc/mm/nohash: Update non SMP version of flush_tlb_page to handle hugetlb address Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 04/68] powerpc/mm: Use big endian page table for book3s 64 Aneesh Kumar K.V
2016-04-22 11:01 ` Michael Ellerman
2016-04-24 22:29 ` Aneesh Kumar K.V
2016-05-29 11:03 ` Anton Blanchard
2016-05-29 21:27 ` Benjamin Herrenschmidt
2016-05-29 23:08 ` Anton Blanchard
2016-05-30 3:42 ` Michael Ellerman
2016-05-30 5:31 ` Anton Blanchard
2016-05-30 8:42 ` Aneesh Kumar K.V
2016-05-30 11:00 ` Benjamin Herrenschmidt
2016-05-30 14:48 ` Aneesh Kumar K.V
2016-05-30 14:59 ` Segher Boessenkool
2016-04-09 6:13 ` [PATCH V2 05/68] powerpc/mm: use _PAGE_READ to indicate Read access Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 06/68] powerpc/mm/subpage: Clear RWX bit to indicate no access Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 07/68] powerpc/mm: Use pte_user instead of opencoding Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 08/68] powerpc/mm: Replace _PAGE_USER with _PAGE_PRIVILEGED Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 09/68] powerpc/mm: Remove RPN_SHIFT and RPN_SIZE Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 10/68] powerpc/mm: Update _PAGE_KERNEL_RO Aneesh Kumar K.V
2016-11-20 0:43 ` [V2,10/68] " Geoff Levand
2016-11-20 18:03 ` Aneesh Kumar K.V
2016-11-21 0:33 ` Geoff Levand
2016-11-23 10:41 ` Aneesh Kumar K.V
2016-11-24 4:04 ` Geoff Levand
2016-04-09 6:13 ` [PATCH V2 11/68] powerpc/mm: Use helper for finding pte bits mapping I/O area Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 12/68] powerpc/mm: Drop WIMG in favour of new constants Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 13/68] powerpc/mm: Use generic version of pmdp_clear_flush_young Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 14/68] powerpc/mm: Use generic version of ptep_clear_flush_young Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 15/68] powerpc/mm: Move common data structure between radix and hash to book3s 64 generic headers Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 16/68] powerpc/mm/power9: Add partition table format Aneesh Kumar K.V
2016-04-11 0:59 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 17/68] powerpc/mm/hash: Add support for POWER9 hash Aneesh Kumar K.V
2016-04-11 4:55 ` Balbir Singh
2016-04-16 19:06 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 18/68] powerpc/mm: Move hash and no hash code to separate files Aneesh Kumar K.V
2016-04-11 5:14 ` Balbir Singh
2016-04-17 10:20 ` Aneesh Kumar K.V
2016-04-20 6:17 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 19/68] powerpc/mm/book3s: Rename hash specific PTE bits to carry H_ prefix Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 20/68] powerpc/mm: Handle _PTE_NONE_MASK Aneesh Kumar K.V
2016-04-11 6:09 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 21/68] powerpc/mm: Move common pte bits and accessors to book3s/64/pgtable.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 22/68] powerpc/mm: Move pte accessors that operate on common pte bits to pgtable.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 23/68] powerpc/mm: Make page table size a variable Aneesh Kumar K.V
2016-04-12 1:49 ` Balbir Singh
2016-04-17 10:27 ` Aneesh Kumar K.V
2016-04-20 6:21 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 24/68] powerpc/mm: Move page table index and and vaddr to pgtable.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 25/68] powerpc/mm: Move pte related function together Aneesh Kumar K.V
2016-04-14 6:50 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 26/68] powerpc/mm/radix: Add radix pte defines Aneesh Kumar K.V
2016-04-21 4:12 ` Balbir Singh
2016-04-23 8:30 ` Benjamin Herrenschmidt
2016-04-26 1:40 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 27/68] powerpc/mm/radix: Dummy radix_enabled() Aneesh Kumar K.V
2016-04-21 4:27 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 28/68] powerpc/mm: Add radix callbacks to pte accessors Aneesh Kumar K.V
2016-04-21 4:30 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 29/68] powerpc/mm: Move hugetlb and THP related pmd accessors to pgtable.h Aneesh Kumar K.V
2016-04-21 9:53 ` Balbir Singh
2016-04-21 9:59 ` Michael Ellerman
2016-04-21 11:42 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 30/68] powerpc/mm/radix: Add radix callback for pmd accessors Aneesh Kumar K.V
2016-04-21 11:39 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 31/68] powerpc/mm: Abstraction for early init routines Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 32/68] powerpc/mm/radix: Add radix callback " Aneesh Kumar K.V
2016-04-21 12:22 ` Balbir Singh [this message]
2016-04-09 6:13 ` [PATCH V2 33/68] powerpc/mm: Abstraction for vmemmap and map_kernel_page Aneesh Kumar K.V
2016-04-21 12:59 ` Balbir Singh
2016-04-28 6:17 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 34/68] powerpc/mm/radix: Add radix callback for vmemmap and map_kernel page Aneesh Kumar K.V
2016-04-21 13:46 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 35/68] powerpc/mm: Abstraction for switch_mmu_context Aneesh Kumar K.V
2016-04-21 14:12 ` Balbir Singh
2016-04-28 6:13 ` Aneesh Kumar K.V
2016-04-28 6:13 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 36/68] powerpc/mm/radix: Add mmu context handling callback for radix Aneesh Kumar K.V
2016-04-22 6:19 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 37/68] powerpc/mm: Rename mmu_context_hash64.c to mmu_context_book3s64.c Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 38/68] powerpc/mm: Hash linux abstraction for tlbflush routines Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 39/68] powerpc/mm/radix: Add " Aneesh Kumar K.V
2016-04-22 7:20 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 40/68] powerpc/mm/radix: Add MMU_FTR_RADIX Aneesh Kumar K.V
2016-04-22 7:23 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 41/68] powerpc/mm/radix: Use STD_MMU_64 to properly isolate hash related code Aneesh Kumar K.V
2016-04-22 7:32 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 42/68] powerpc/mm/radix: Isolate hash table function from pseries guest code Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 43/68] powerpc/mm/radix: Add checks in slice code to catch radix usage Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 44/68] powerpc/mm/radix: Limit paca allocation in radix Aneesh Kumar K.V
2016-04-22 8:07 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 45/68] powerpc/mm/radix: Pick the address layout for radix config Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 46/68] powerpc/mm/radix: Update secondary PTCR Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 47/68] powerpc/mm: Make a copy of pgalloc.h for 32 and 64 book3s Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 48/68] powerpc/mm: Copy pgalloc (part 2) Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 49/68] powerpc/mm: Revert changes made to nohash pgalloc-64.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 50/68] powerpc/mm: Simplify the code dropping 4 level table #ifdef Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 51/68] powerpc/mm: Rename function to indicate we are allocating fragments Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 52/68] powerpc/mm: make 4k and 64k use pte_t for pgtable_t Aneesh Kumar K.V
2016-04-26 2:58 ` Balbir Singh
2016-04-28 6:03 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 53/68] powerpc/mm: Add radix pgalloc details Aneesh Kumar K.V
2016-04-26 3:05 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 54/68] powerpc/mm: Update pte filter for radix Aneesh Kumar K.V
2016-04-26 3:06 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 55/68] powerpc/mm: VMALLOC abstraction Aneesh Kumar K.V
2016-04-22 6:52 ` Michael Neuling
2016-04-23 3:29 ` Aneesh Kumar K.V
2016-04-26 6:20 ` Balbir Singh
2016-04-26 4:47 ` Balbir Singh
2016-04-28 6:09 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 56/68] powerpc/radix: update mmu cache Aneesh Kumar K.V
2016-04-26 6:23 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 57/68] powerpc/mm: pte_frag abstraction Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 58/68] powerpc/mm: Fix vma_mmu_pagesize for radix Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 59/68] powerpc/mm: Add radix support for hugetlb Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 60/68] powerpc/mm/radix: Make sure swapper pgdir is properly aligned Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 61/68] powerpc/mm/radix: Add hugetlb support 4K page size Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 62/68] powerpc/mm: Drop PTE_ATOMIC_UPDATES from pmd_hugepage_update Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 63/68] powerpc/mm: THP is only available on hash64 as of now Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 64/68] powerpc/mm/thp: Abstraction for THP functions Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 65/68] powerpc/mm/radix: Add radix THP callbacks Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 66/68] powerpc/mm/radix: Add THP support for 4k linux page size Aneesh Kumar K.V
2016-04-28 4:56 ` [V2, " Michael Ellerman
2016-04-28 6:28 ` Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 67/68] powerpc/mm/radix: Cputable update for radix Aneesh Kumar K.V
2016-04-28 14:10 ` [V2,67/68] " Michael Ellerman
2016-04-09 6:14 ` [PATCH V2 68/68] powerpc/mm/radix: Use firmware feature to disable radix Aneesh Kumar K.V
2016-04-20 2:59 ` [V2, " Michael Ellerman
2016-04-20 8:21 ` Aneesh Kumar K.V
2016-04-20 11:25 ` Michael Neuling
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