From: "Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>
To: Balbir Singh <bsingharora@gmail•com>,
benh@kernel•crashing.org, paulus@samba•org, mpe@ellerman•id.au
Cc: linuxppc-dev@lists•ozlabs.org
Subject: Re: [PATCH V2 17/68] powerpc/mm/hash: Add support for POWER9 hash
Date: Sun, 17 Apr 2016 00:36:56 +0530 [thread overview]
Message-ID: <87mvot9xv3.fsf@skywalker.in.ibm.com> (raw)
In-Reply-To: <570B2E4E.10708@gmail.com>
Balbir Singh <bsingharora@gmail•com> writes:
> On 09/04/16 16:13, Aneesh Kumar K.V wrote:
>> PowerISA 3.0 adds a parition table indexed by LPID. Parition table allow
>> us to specify the MMU model that will be used for guest and host
>> translation.
>>
>> This patch add support with SLB based hash model (UPRT = 0). What is
>> required with this model is to support the new hash page table entry
>> format and also setup Partition table such we use hash table for
>> address translation.
>>
>> We don't have segment table support yet.
>>
>> Inorder to make sure we don't load KVM module on Power9 (since we
>> don't have kvm support yet) this patch also disable kvm on Power9
>>
>> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux•vnet.ibm.com>
>> ---
>> arch/powerpc/include/asm/book3s/64/mmu-hash.h | 13 +++++++--
>> arch/powerpc/kvm/book3s_hv.c | 6 ++++
>> arch/powerpc/kvm/book3s_pr.c | 6 +++-
>> arch/powerpc/mm/hash_native_64.c | 11 ++++++-
>> arch/powerpc/mm/hash_utils_64.c | 42 +++++++++++++++++++++++++--
>> arch/powerpc/mm/pgtable_64.c | 7 +++++
>> arch/powerpc/platforms/ps3/htab.c | 2 +-
>> arch/powerpc/platforms/pseries/lpar.c | 2 +-
>> 8 files changed, 81 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
>> index ce73736b42db..843b5d839904 100644
>> --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
>> +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
>> @@ -78,6 +78,10 @@
>> #define HPTE_V_SECONDARY ASM_CONST(0x0000000000000002)
>> #define HPTE_V_VALID ASM_CONST(0x0000000000000001)
>>
>> +/*
>> + * ISA 3.0 have a different HPTE format.
>> + */
>> +#define HPTE_R_3_0_SSIZE_SHIFT 58
>> #define HPTE_R_PP0 ASM_CONST(0x8000000000000000)
>> #define HPTE_R_TS ASM_CONST(0x4000000000000000)
>> #define HPTE_R_KEY_HI ASM_CONST(0x3000000000000000)
>> @@ -224,7 +228,8 @@ static inline unsigned long hpte_encode_avpn(unsigned long vpn, int psize,
>> */
>> v = (vpn >> (23 - VPN_SHIFT)) & ~(mmu_psize_defs[psize].avpnm);
>> v <<= HPTE_V_AVPN_SHIFT;
>> - v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT;
>> + if (!cpu_has_feature(CPU_FTR_ARCH_300))
>> + v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT;
>> return v;
>> }
>>
>> @@ -248,8 +253,12 @@ static inline unsigned long hpte_encode_v(unsigned long vpn, int base_psize,
>> * aligned for the requested page size
>> */
>> static inline unsigned long hpte_encode_r(unsigned long pa, int base_psize,
>> - int actual_psize)
>> + int actual_psize, int ssize)
>> {
>> +
>> + if (cpu_has_feature(CPU_FTR_ARCH_300))
>> + pa |= ((unsigned long) ssize) << HPTE_R_3_0_SSIZE_SHIFT;
>> +
>
> Looks good, I was wondering if we can compute cpu_has_feature(CPU_FTR_ARCH_300) once for the instance
> and use it, but I am just nit-picking. I've never tried using ASM_MMU_FTR_IF(), I don't know
> if you've explored it. Not very important for this patchset though
There were multiple efforts w.r.t. to this. I tried to fix only
radix_enabled() using code patching. But we also had Kevin doing
http://mid.gmane.org/1440072876-8321-1-git-send-email-haokexin@gmail.com
>
>> /* A 4K page needs no special encoding */
>> if (actual_psize == MMU_PAGE_4K)
>> return pa & HPTE_R_RPN;
>> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
>> index baeddb06811d..c07600efcef6 100644
>> --- a/arch/powerpc/kvm/book3s_hv.c
>> +++ b/arch/powerpc/kvm/book3s_hv.c
>> @@ -3083,6 +3083,12 @@ static int kvmppc_core_check_processor_compat_hv(void)
>> if (!cpu_has_feature(CPU_FTR_HVMODE) ||
>> !cpu_has_feature(CPU_FTR_ARCH_206))
>> return -EIO;
>> + /*
>> + * Disable KVM for Power9, untill the required bits merged.
>> + */
>> + if (cpu_has_feature(CPU_FTR_ARCH_300))
>> + return -EIO;
>> +
>> return 0;
>> }
>>
>> diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
>> index 95bceca8f40e..ffbaf40b7f31 100644
>> --- a/arch/powerpc/kvm/book3s_pr.c
>> +++ b/arch/powerpc/kvm/book3s_pr.c
>> @@ -1683,7 +1683,11 @@ static void kvmppc_core_destroy_vm_pr(struct kvm *kvm)
>>
>> static int kvmppc_core_check_processor_compat_pr(void)
>> {
>> - /* we are always compatible */
>> + /*
>> + * Disable KVM for Power9 untill the required bits merged.
>> + */
>> + if (cpu_has_feature(CPU_FTR_ARCH_300))
>> + return -EIO;
>> return 0;
>> }
>>
>> diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
>> index 8eaac81347fd..d873f6507f72 100644
>> --- a/arch/powerpc/mm/hash_native_64.c
>> +++ b/arch/powerpc/mm/hash_native_64.c
>> @@ -221,7 +221,7 @@ static long native_hpte_insert(unsigned long hpte_group, unsigned long vpn,
>> return -1;
>>
>> hpte_v = hpte_encode_v(vpn, psize, apsize, ssize) | vflags | HPTE_V_VALID;
>> - hpte_r = hpte_encode_r(pa, psize, apsize) | rflags;
>> + hpte_r = hpte_encode_r(pa, psize, apsize, ssize) | rflags;
>>
>> if (!(vflags & HPTE_V_BOLTED)) {
>> DBG_LOW(" i=%x hpte_v=%016lx, hpte_r=%016lx\n",
>> @@ -719,6 +719,12 @@ static void native_flush_hash_range(unsigned long number, int local)
>> local_irq_restore(flags);
>> }
>>
>> +static int native_update_partition_table(u64 patb1)
>> +{
>> + partition_tb->patb1 = cpu_to_be64(patb1);
>
> Do we need to tell the hardware that patb1 was updated?
>
you mean do we need sync instructions around ? I checked ISA and don't
find anthing specific.
>> + return 0;
>> +}
>> +
>> void __init hpte_init_native(void)
>> {
>> ppc_md.hpte_invalidate = native_hpte_invalidate;
>> @@ -729,4 +735,7 @@ void __init hpte_init_native(void)
>> ppc_md.hpte_clear_all = native_hpte_clear;
>> ppc_md.flush_hash_range = native_flush_hash_range;
>> ppc_md.hugepage_invalidate = native_hugepage_invalidate;
>> +
>> + if (cpu_has_feature(CPU_FTR_ARCH_300))
>> + ppc_md.update_partition_table = native_update_partition_table;
>> }
>> diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
>> index e924690a5a0e..43e0d86b7ca1 100644
>> --- a/arch/powerpc/mm/hash_utils_64.c
>> +++ b/arch/powerpc/mm/hash_utils_64.c
>> @@ -674,6 +674,41 @@ int remove_section_mapping(unsigned long start, unsigned long end)
>> }
>> #endif /* CONFIG_MEMORY_HOTPLUG */
>>
>> +static void __init hash_init_partition_table(phys_addr_t hash_table,
>> + unsigned long pteg_count)
>> +{
>> + unsigned long ps_field;
>> + unsigned long htab_size;
>> + unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;
>> +
>> + /*
>> + * slb llp encoding for the page size used in VPM real mode.
>> + * We can ignore that for lpid 0
>> + */
>> + ps_field = 0;
>> + htab_size = __ilog2(pteg_count) - 11;
>> +
>> + BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 24), "Partition table size too large.");
>> + partition_tb = __va(memblock_alloc_base(patb_size, patb_size,
>> + MEMBLOCK_ALLOC_ANYWHERE));
>> +
>> + /* Initialize the Partition Table with no entries */
>> + memset((void *)partition_tb, 0, patb_size);
>> + partition_tb->patb0 = cpu_to_be64(ps_field | hash_table | htab_size);
>> + /*
>> + * FIXME!! This should be done via update_partition table
>> + * For now UPRT is 0 for us.
>> + */
>> + partition_tb->patb1 = 0;
>
> So the design is that we allocate upto 2^24/16 entries for the partition table
> and set the first entry LPID0 to use HPT with ps_field set to 0 and patb1
> to be updated by the callback we provide via native_update_partition_table?
For hash with SLB we will always find patb1 to be 0. Once we get
segment table, we will have a if(MMU_FTR_SEG_TABLE) here to do this
correctly.
>
>> + DBG("Partition table %p\n", partition_tb);
>> + /*
>> + * update partition table control register,
>> + * 64 K size.
>> + */
>> + mtspr(SPRN_PTCR, __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
>> +
>> +}
>> +
>> static void __init htab_initialize(void)
>> {
>> unsigned long table;
>> @@ -742,8 +777,11 @@ static void __init htab_initialize(void)
>> /* Initialize the HPT with no entries */
>> memset((void *)table, 0, htab_size_bytes);
>>
>> - /* Set SDR1 */
>> - mtspr(SPRN_SDR1, _SDR1);
>> + if (!cpu_has_feature(CPU_FTR_ARCH_300))
>> + /* Set SDR1 */
>> + mtspr(SPRN_SDR1, _SDR1);
>> + else
>> + hash_init_partition_table(table, pteg_count);
>> }
>>
>> prot = pgprot_val(PAGE_KERNEL);
>> diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
>> index 98c91ad18ba7..5fff787da17a 100644
>> --- a/arch/powerpc/mm/pgtable_64.c
>> +++ b/arch/powerpc/mm/pgtable_64.c
>> @@ -69,6 +69,13 @@
>> #endif
>> #endif
>
> <snip>
>
> Otherwise looks good!
>
> Balbir Singh
Thanks
-aneesh
next prev parent reply other threads:[~2016-04-17 19:34 UTC|newest]
Thread overview: 139+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-09 6:12 [PATCH V2 00/68] PowerISA 3.0 Radix page table support Aneesh Kumar K.V
2016-04-09 6:12 ` [PATCH V2 01/68] powerpc/cxl: Use REGION_ID instead of opencoding Aneesh Kumar K.V
2016-04-11 0:37 ` Andrew Donnellan
2016-04-13 2:42 ` Aneesh Kumar K.V
2016-04-20 3:03 ` Michael Ellerman
2016-04-20 7:53 ` Aneesh Kumar K.V
2016-04-09 6:12 ` [PATCH V2 02/68] powerpc/mm/nohash: Return correctly from flush_tlb_page Aneesh Kumar K.V
2016-04-20 4:08 ` [V2, " Michael Ellerman
2016-04-20 7:49 ` Aneesh Kumar K.V
2016-04-09 6:12 ` [PATCH V2 03/68] powerpc/mm/nohash: Update non SMP version of flush_tlb_page to handle hugetlb address Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 04/68] powerpc/mm: Use big endian page table for book3s 64 Aneesh Kumar K.V
2016-04-22 11:01 ` Michael Ellerman
2016-04-24 22:29 ` Aneesh Kumar K.V
2016-05-29 11:03 ` Anton Blanchard
2016-05-29 21:27 ` Benjamin Herrenschmidt
2016-05-29 23:08 ` Anton Blanchard
2016-05-30 3:42 ` Michael Ellerman
2016-05-30 5:31 ` Anton Blanchard
2016-05-30 8:42 ` Aneesh Kumar K.V
2016-05-30 11:00 ` Benjamin Herrenschmidt
2016-05-30 14:48 ` Aneesh Kumar K.V
2016-05-30 14:59 ` Segher Boessenkool
2016-04-09 6:13 ` [PATCH V2 05/68] powerpc/mm: use _PAGE_READ to indicate Read access Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 06/68] powerpc/mm/subpage: Clear RWX bit to indicate no access Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 07/68] powerpc/mm: Use pte_user instead of opencoding Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 08/68] powerpc/mm: Replace _PAGE_USER with _PAGE_PRIVILEGED Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 09/68] powerpc/mm: Remove RPN_SHIFT and RPN_SIZE Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 10/68] powerpc/mm: Update _PAGE_KERNEL_RO Aneesh Kumar K.V
2016-11-20 0:43 ` [V2,10/68] " Geoff Levand
2016-11-20 18:03 ` Aneesh Kumar K.V
2016-11-21 0:33 ` Geoff Levand
2016-11-23 10:41 ` Aneesh Kumar K.V
2016-11-24 4:04 ` Geoff Levand
2016-04-09 6:13 ` [PATCH V2 11/68] powerpc/mm: Use helper for finding pte bits mapping I/O area Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 12/68] powerpc/mm: Drop WIMG in favour of new constants Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 13/68] powerpc/mm: Use generic version of pmdp_clear_flush_young Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 14/68] powerpc/mm: Use generic version of ptep_clear_flush_young Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 15/68] powerpc/mm: Move common data structure between radix and hash to book3s 64 generic headers Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 16/68] powerpc/mm/power9: Add partition table format Aneesh Kumar K.V
2016-04-11 0:59 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 17/68] powerpc/mm/hash: Add support for POWER9 hash Aneesh Kumar K.V
2016-04-11 4:55 ` Balbir Singh
2016-04-16 19:06 ` Aneesh Kumar K.V [this message]
2016-04-09 6:13 ` [PATCH V2 18/68] powerpc/mm: Move hash and no hash code to separate files Aneesh Kumar K.V
2016-04-11 5:14 ` Balbir Singh
2016-04-17 10:20 ` Aneesh Kumar K.V
2016-04-20 6:17 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 19/68] powerpc/mm/book3s: Rename hash specific PTE bits to carry H_ prefix Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 20/68] powerpc/mm: Handle _PTE_NONE_MASK Aneesh Kumar K.V
2016-04-11 6:09 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 21/68] powerpc/mm: Move common pte bits and accessors to book3s/64/pgtable.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 22/68] powerpc/mm: Move pte accessors that operate on common pte bits to pgtable.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 23/68] powerpc/mm: Make page table size a variable Aneesh Kumar K.V
2016-04-12 1:49 ` Balbir Singh
2016-04-17 10:27 ` Aneesh Kumar K.V
2016-04-20 6:21 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 24/68] powerpc/mm: Move page table index and and vaddr to pgtable.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 25/68] powerpc/mm: Move pte related function together Aneesh Kumar K.V
2016-04-14 6:50 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 26/68] powerpc/mm/radix: Add radix pte defines Aneesh Kumar K.V
2016-04-21 4:12 ` Balbir Singh
2016-04-23 8:30 ` Benjamin Herrenschmidt
2016-04-26 1:40 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 27/68] powerpc/mm/radix: Dummy radix_enabled() Aneesh Kumar K.V
2016-04-21 4:27 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 28/68] powerpc/mm: Add radix callbacks to pte accessors Aneesh Kumar K.V
2016-04-21 4:30 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 29/68] powerpc/mm: Move hugetlb and THP related pmd accessors to pgtable.h Aneesh Kumar K.V
2016-04-21 9:53 ` Balbir Singh
2016-04-21 9:59 ` Michael Ellerman
2016-04-21 11:42 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 30/68] powerpc/mm/radix: Add radix callback for pmd accessors Aneesh Kumar K.V
2016-04-21 11:39 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 31/68] powerpc/mm: Abstraction for early init routines Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 32/68] powerpc/mm/radix: Add radix callback " Aneesh Kumar K.V
2016-04-21 12:22 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 33/68] powerpc/mm: Abstraction for vmemmap and map_kernel_page Aneesh Kumar K.V
2016-04-21 12:59 ` Balbir Singh
2016-04-28 6:17 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 34/68] powerpc/mm/radix: Add radix callback for vmemmap and map_kernel page Aneesh Kumar K.V
2016-04-21 13:46 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 35/68] powerpc/mm: Abstraction for switch_mmu_context Aneesh Kumar K.V
2016-04-21 14:12 ` Balbir Singh
2016-04-28 6:13 ` Aneesh Kumar K.V
2016-04-28 6:13 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 36/68] powerpc/mm/radix: Add mmu context handling callback for radix Aneesh Kumar K.V
2016-04-22 6:19 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 37/68] powerpc/mm: Rename mmu_context_hash64.c to mmu_context_book3s64.c Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 38/68] powerpc/mm: Hash linux abstraction for tlbflush routines Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 39/68] powerpc/mm/radix: Add " Aneesh Kumar K.V
2016-04-22 7:20 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 40/68] powerpc/mm/radix: Add MMU_FTR_RADIX Aneesh Kumar K.V
2016-04-22 7:23 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 41/68] powerpc/mm/radix: Use STD_MMU_64 to properly isolate hash related code Aneesh Kumar K.V
2016-04-22 7:32 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 42/68] powerpc/mm/radix: Isolate hash table function from pseries guest code Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 43/68] powerpc/mm/radix: Add checks in slice code to catch radix usage Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 44/68] powerpc/mm/radix: Limit paca allocation in radix Aneesh Kumar K.V
2016-04-22 8:07 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 45/68] powerpc/mm/radix: Pick the address layout for radix config Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 46/68] powerpc/mm/radix: Update secondary PTCR Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 47/68] powerpc/mm: Make a copy of pgalloc.h for 32 and 64 book3s Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 48/68] powerpc/mm: Copy pgalloc (part 2) Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 49/68] powerpc/mm: Revert changes made to nohash pgalloc-64.h Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 50/68] powerpc/mm: Simplify the code dropping 4 level table #ifdef Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 51/68] powerpc/mm: Rename function to indicate we are allocating fragments Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 52/68] powerpc/mm: make 4k and 64k use pte_t for pgtable_t Aneesh Kumar K.V
2016-04-26 2:58 ` Balbir Singh
2016-04-28 6:03 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 53/68] powerpc/mm: Add radix pgalloc details Aneesh Kumar K.V
2016-04-26 3:05 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 54/68] powerpc/mm: Update pte filter for radix Aneesh Kumar K.V
2016-04-26 3:06 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 55/68] powerpc/mm: VMALLOC abstraction Aneesh Kumar K.V
2016-04-22 6:52 ` Michael Neuling
2016-04-23 3:29 ` Aneesh Kumar K.V
2016-04-26 6:20 ` Balbir Singh
2016-04-26 4:47 ` Balbir Singh
2016-04-28 6:09 ` Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 56/68] powerpc/radix: update mmu cache Aneesh Kumar K.V
2016-04-26 6:23 ` Balbir Singh
2016-04-09 6:13 ` [PATCH V2 57/68] powerpc/mm: pte_frag abstraction Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 58/68] powerpc/mm: Fix vma_mmu_pagesize for radix Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 59/68] powerpc/mm: Add radix support for hugetlb Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 60/68] powerpc/mm/radix: Make sure swapper pgdir is properly aligned Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 61/68] powerpc/mm/radix: Add hugetlb support 4K page size Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 62/68] powerpc/mm: Drop PTE_ATOMIC_UPDATES from pmd_hugepage_update Aneesh Kumar K.V
2016-04-09 6:13 ` [PATCH V2 63/68] powerpc/mm: THP is only available on hash64 as of now Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 64/68] powerpc/mm/thp: Abstraction for THP functions Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 65/68] powerpc/mm/radix: Add radix THP callbacks Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 66/68] powerpc/mm/radix: Add THP support for 4k linux page size Aneesh Kumar K.V
2016-04-28 4:56 ` [V2, " Michael Ellerman
2016-04-28 6:28 ` Aneesh Kumar K.V
2016-04-09 6:14 ` [PATCH V2 67/68] powerpc/mm/radix: Cputable update for radix Aneesh Kumar K.V
2016-04-28 14:10 ` [V2,67/68] " Michael Ellerman
2016-04-09 6:14 ` [PATCH V2 68/68] powerpc/mm/radix: Use firmware feature to disable radix Aneesh Kumar K.V
2016-04-20 2:59 ` [V2, " Michael Ellerman
2016-04-20 8:21 ` Aneesh Kumar K.V
2016-04-20 11:25 ` Michael Neuling
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