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From: Saeed Mahameed <saeed@kernel•org>
To: "David S. Miller" <davem@davemloft•net>,
	Jakub Kicinski <kuba@kernel•org>, Paolo Abeni <pabeni@redhat•com>,
	Eric Dumazet <edumazet@google•com>
Cc: Saeed Mahameed <saeedm@nvidia•com>,
	netdev@vger•kernel.org, Tariq Toukan <tariqt@nvidia•com>,
	Gal Pressman <gal@nvidia•com>,
	Leon Romanovsky <leonro@nvidia•com>,
	Shahar Shitrit <shshitrit@nvidia•com>,
	Carolina Jubran <cjubran@nvidia•com>
Subject: [net 3/7] net/mlx5e: Add missing link mode to ptys2ext_ethtool_map
Date: Mon,  9 Sep 2024 12:45:01 -0700	[thread overview]
Message-ID: <20240909194505.69715-4-saeed@kernel.org> (raw)
In-Reply-To: <20240909194505.69715-1-saeed@kernel.org>

From: Shahar Shitrit <shshitrit@nvidia•com>

Add MLX5E_400GAUI_8_400GBASE_CR8 to the extended modes
in ptys2ext_ethtool_table, since it was missing.

Fixes: 6a897372417e ("net/mlx5: ethtool, Add ethtool support for 50Gbps per lane link modes")
Signed-off-by: Shahar Shitrit <shshitrit@nvidia•com>
Reviewed-by: Tariq Toukan <tariqt@nvidia•com>
Reviewed-by: Carolina Jubran <cjubran@nvidia•com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia•com>
---
 drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
index 1e829b97eaac..1cf3c54d343e 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
@@ -208,6 +208,12 @@ void mlx5e_build_ptys2ethtool_map(void)
 				       ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 				       ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT,
 				       ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT);
+	MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_400GAUI_8_400GBASE_CR8, ext,
+				       ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT,
+				       ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT,
+				       ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
+				       ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT,
+				       ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT);
 	MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_1_100GBASE_CR_KR, ext,
 				       ETHTOOL_LINK_MODE_100000baseKR_Full_BIT,
 				       ETHTOOL_LINK_MODE_100000baseSR_Full_BIT,
-- 
2.46.0


  parent reply	other threads:[~2024-09-09 19:45 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-09 19:44 [pull request][net 0/7] mlx5 fixes 2024-09-09 Saeed Mahameed
2024-09-09 19:44 ` [net 1/7] net/mlx5: Update the list of the PCI supported devices Saeed Mahameed
2024-09-11  3:20   ` patchwork-bot+netdevbpf
2024-09-09 19:45 ` [net 2/7] net/mlx5e: Add missing link modes to ptys2ethtool_map Saeed Mahameed
2024-09-09 19:45 ` Saeed Mahameed [this message]
2024-09-09 19:45 ` [net 4/7] net/mlx5: Explicitly set scheduling element and TSAR type Saeed Mahameed
2024-09-09 19:45 ` [net 5/7] net/mlx5: Add missing masks and QoS bit masks for scheduling elements Saeed Mahameed
2024-09-09 19:45 ` [net 6/7] net/mlx5: Verify support for scheduling element and TSAR type Saeed Mahameed
2024-09-09 19:45 ` [net 7/7] net/mlx5: Fix bridge mode operations when there are no VFs Saeed Mahameed

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