From: emilio@elopez•com.ar (Emilio López)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 1/4] clk: sunxi: Allwinner A20 output clock support
Date: Mon, 23 Dec 2013 13:13:47 -0300 [thread overview]
Message-ID: <52B8613B.9040503@elopez.com.ar> (raw)
In-Reply-To: <1387787827-11341-2-git-send-email-wens@csie.org>
Hi,
El 23/12/13 05:37, Chen-Yu Tsai escribi?:
> This patch adds support for the external clock outputs on the
> Allwinner A20 SoC. The clock outputs are similar to "module 0"
> type clocks, with different offsets and widths for clock factors.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie•org>
This patch looks good to me,
Acked-by: Emilio L?pez <emilio@elopez•com.ar>
> ---
> drivers/clk/sunxi/clk-sunxi.c | 57 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 57 insertions(+)
>
> diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
> index 25d99b6..19d9e9e 100644
> --- a/drivers/clk/sunxi/clk-sunxi.c
> +++ b/drivers/clk/sunxi/clk-sunxi.c
> @@ -330,6 +330,47 @@ static void sun4i_get_mod0_factors(u32 *freq, u32 parent_rate,
>
>
> /**
> + * sun7i_a20_get_out_factors() - calculates m, p factors for CLK_OUT_A/B
> + * CLK_OUT rate is calculated as follows
> + * rate = (parent_rate >> p) / (m + 1);
> + */
> +
> +static void sun7i_a20_get_out_factors(u32 *freq, u32 parent_rate,
> + u8 *n, u8 *k, u8 *m, u8 *p)
> +{
> + u8 div, calcm, calcp;
> +
> + /* These clocks can only divide, so we will never be able to achieve
> + * frequencies higher than the parent frequency */
> + if (*freq > parent_rate)
> + *freq = parent_rate;
> +
> + div = parent_rate / *freq;
> +
> + if (div < 32)
> + calcp = 0;
> + else if (div / 2 < 32)
> + calcp = 1;
> + else if (div / 4 < 32)
> + calcp = 2;
> + else
> + calcp = 3;
> +
> + calcm = DIV_ROUND_UP(div, 1 << calcp);
> +
> + *freq = (parent_rate >> calcp) / calcm;
> +
> + /* we were called to round the frequency, we can now return */
> + if (n == NULL)
> + return;
> +
> + *m = calcm - 1;
> + *p = calcp;
> +}
> +
> +
> +
> +/**
> * sunxi_factors_clk_setup() - Setup function for factor clocks
> */
>
> @@ -384,6 +425,14 @@ static struct clk_factors_config sun4i_mod0_config = {
> .pwidth = 2,
> };
>
> +/* user manual says "n" but it's really "p" */
> +static struct clk_factors_config sun7i_a20_out_config = {
> + .mshift = 8,
> + .mwidth = 5,
> + .pshift = 20,
> + .pwidth = 2,
> +};
> +
> static const struct factors_data sun4i_pll1_data __initconst = {
> .enable = 31,
> .table = &sun4i_pll1_config,
> @@ -414,6 +463,13 @@ static const struct factors_data sun4i_mod0_data __initconst = {
> .getter = sun4i_get_mod0_factors,
> };
>
> +static const struct factors_data sun7i_a20_out_data __initconst = {
> + .enable = 31,
> + .mux = 24,
> + .table = &sun7i_a20_out_config,
> + .getter = sun7i_a20_get_out_factors,
> +};
> +
> static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
> const struct factors_data *data)
> {
> @@ -912,6 +968,7 @@ static const struct of_device_id clk_factors_match[] __initconst = {
> {.compatible = "allwinner,sun6i-a31-pll1-clk", .data = &sun6i_a31_pll1_data,},
> {.compatible = "allwinner,sun4i-apb1-clk", .data = &sun4i_apb1_data,},
> {.compatible = "allwinner,sun4i-mod0-clk", .data = &sun4i_mod0_data,},
> + {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,},
> {}
> };
next prev parent reply other threads:[~2013-12-23 16:13 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-23 8:37 [PATCH 0/4] clk: sunxi: add A20 external output clock support Chen-Yu Tsai
2013-12-23 8:37 ` [PATCH 1/4] clk: sunxi: Allwinner A20 " Chen-Yu Tsai
2013-12-23 16:13 ` Emilio López [this message]
2013-12-23 16:23 ` Emilio López
2013-12-23 19:34 ` Mike Turquette
2013-12-23 8:37 ` [PATCH 2/4] ARM: dts: sun7i: external clock outputs Chen-Yu Tsai
2013-12-23 16:21 ` Emilio López
2013-12-23 16:43 ` Chen-Yu Tsai
2013-12-23 16:52 ` Emilio López
2013-12-23 8:37 ` [PATCH 3/4] pinctrl: sunxi: Add Allwinner A20 clock output pin functions Chen-Yu Tsai
2013-12-23 16:33 ` Emilio López
2013-12-23 8:37 ` [PATCH 4/4] ARM: dts: sun7i: Add pin muxing options for clock outputs Chen-Yu Tsai
2013-12-23 16:44 ` Emilio López
2013-12-23 16:50 ` Chen-Yu Tsai
2013-12-23 8:37 ` [PATCH 0/4] clk: sunxi: add A20 external output clock support Chen-Yu Tsai
2013-12-24 13:26 ` Chen-Yu Tsai
2013-12-24 13:26 ` [PATCH 1/4] clk: sunxi: Allwinner A20 " Chen-Yu Tsai
2013-12-29 21:30 ` Mike Turquette
2013-12-29 21:35 ` Emilio López
2013-12-24 13:26 ` [PATCH 2/4] ARM: dts: sun7i: external clock outputs Chen-Yu Tsai
2013-12-24 13:26 ` [PATCH 3/4] pinctrl: sunxi: Add Allwinner A20 clock output pin functions Chen-Yu Tsai
2013-12-24 13:26 ` [PATCH 4/4] ARM: dts: sun7i: Add pin muxing options for clock outputs Chen-Yu Tsai
2013-12-29 20:59 ` [PATCH 0/4] clk: sunxi: add A20 external output clock support Maxime Ripard
2013-12-29 21:56 ` Mike Turquette
2013-12-30 15:12 ` Maxime Ripard
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=52B8613B.9040503@elopez.com.ar \
--to=emilio@elopez$(echo .)com.ar \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox