From: t.figa@samsung•com (Tomasz Figa)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH V4 1/5] phy: Add new Exynos5 USB 3.0 PHY driver
Date: Wed, 09 Apr 2014 15:33:05 +0200 [thread overview]
Message-ID: <53454C11.7060607@samsung.com> (raw)
In-Reply-To: <CAFp+6iEzaxCQNkGZWuBnAaAHk0uXrX4KhjVbaJfZFChB6uzk4A@mail.gmail.com>
On 09.04.2014 13:49, Vivek Gautam wrote:
> Hi,
>
>
> On Wed, Apr 9, 2014 at 4:36 PM, Tomasz Figa <t.figa@samsung•com> wrote:
>> Hi Vivek,
>>
>> Please see my comments inline.
>>
>>
>> On 08.04.2014 16:36, Vivek Gautam wrote:
>>>
>>> Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs.
>>> The new driver uses the generic PHY framework and will interact
>>> with DWC3 controller present on Exynos5 series of SoCs.
>>> Thereby, removing old phy-samsung-usb3 driver and related code
>>> used untill now which was based on usb/phy framework.
>>>
>>> Signed-off-by: Vivek Gautam <gautam.vivek@samsung•com>
>>> ---
>>> .../devicetree/bindings/phy/samsung-phy.txt | 42 ++
>>> drivers/phy/Kconfig | 11 +
>>> drivers/phy/Makefile | 1 +
>>> drivers/phy/phy-exynos5-usbdrd.c | 668
>>> ++++++++++++++++++++
>>> 4 files changed, 722 insertions(+)
>>> create mode 100644 drivers/phy/phy-exynos5-usbdrd.c
>>
>>
>> [snip]
>>
>>
>>> + Additional clock required for Exynos5420:
>>> + - usb30_sclk_100m: Additional special clock used for PHY operation
>>> + depicted as 'sclk_usbphy30' in CMU of
>>> Exynos5420.
>>
>>
>> Are you sure this isn't simply a gate for the ref clock, as it can be found
>> on another SoC that is not upstream yet? I don't have documentation for
>> Exynos 5420 so I can't tell, but I'd like to ask you to recheck this.
>
>>From what i can see in the manual :
> sclk_usbphy30 is derived from OSCCLK.
> It is coming from a MUX (default input line to this is OSCCLK) and
> then through a DIV
> there's this gate.
>
> {OSCCLK + other sources} --->[MUX] ---> [DIV] --> [GATE for
> sclk_usbphy30]
>
> the {rate of sclk_usbphy30} == OSCCLK
>
> However the 'ref' clock that we have been using is the actual oscillator clock.
> And on SoC Exynos5250, we don't have any such gate (sclk_usbphy30).
> So should this mean that ref clock and sclk_usbphy30 are still be controlled by
> two different gates ?
>
Is there maybe a diagram of PHY input clocks in the datasheet, like for
USB 2.0 PHY in Exynos4210/4412/5250 datasheets in the chapter about
USB2.0 Device? Something like:
____________________________________
| |
| ___________|
XusbXTI | Phy_fsel[2:0] | _______ |
_______[X]_______| | __________|_|___|\__|_|
| | _v___ | _____ ^ | |/ | |
_____ | | | | | | | | ___ | |
___ | | | | | | | | | |_|_|
|___| | | X 0 |____|_| PLL |__|_|_|CLK|_|_|
_____ | | | | | | |DIV|_|_|
|_______[X] | |_____| 12 |_____|480 | |___| | |
| MHz MHz |Digital| |
XusbXTO | USB PHY |_______| |
|____________________________________|
Best regards,
Tomasz
next prev parent reply other threads:[~2014-04-09 13:33 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-08 14:36 [PATCH V4 0/5] Add Exynos5 USB 3.0 phy driver based on generic PHY framework Vivek Gautam
2014-04-08 14:36 ` [PATCH V4 1/5] phy: Add new Exynos5 USB 3.0 PHY driver Vivek Gautam
2014-04-09 11:06 ` Tomasz Figa
2014-04-09 11:49 ` Vivek Gautam
2014-04-09 13:33 ` Tomasz Figa [this message]
2014-04-10 11:39 ` Vivek Gautam
2014-04-15 6:09 ` Vivek Gautam
2014-04-16 13:44 ` Tomasz Figa
2014-04-16 14:49 ` Vivek Gautam
2014-04-22 2:18 ` Jingoo Han
2014-04-22 3:35 ` Vivek Gautam
2014-04-14 11:54 ` Kishon Vijay Abraham I
2014-04-14 12:05 ` Vivek Gautam
2014-04-14 13:05 ` Kishon Vijay Abraham I
2014-04-14 13:44 ` Tomasz Figa
2014-04-14 13:49 ` Vivek Gautam
2014-04-14 14:21 ` Sylwester Nawrocki
2014-04-15 5:07 ` Vivek Gautam
2014-04-14 12:27 ` Kishon Vijay Abraham I
2014-04-14 12:42 ` Vivek Gautam
2014-04-14 12:59 ` Kishon Vijay Abraham I
2014-04-14 13:20 ` Vivek Gautam
2014-04-14 13:26 ` Kishon Vijay Abraham I
2014-04-14 13:40 ` Vivek Gautam
2014-04-14 13:46 ` Vivek Gautam
2014-04-14 13:49 ` Tomasz Figa
2014-04-15 13:59 ` Kishon Vijay Abraham I
2014-04-14 14:37 ` Sylwester Nawrocki
2014-04-15 5:09 ` Vivek Gautam
2014-04-25 7:57 ` Tushar Behera
2014-04-25 8:08 ` Vivek Gautam
2014-04-08 14:36 ` [PATCH v4 2/5] dt: exynos5420: Enable support for USB 3.0 PHY controller Vivek Gautam
2014-04-09 11:10 ` Tomasz Figa
2014-04-08 14:36 ` [PATCH V4 3/5] dt: exynos5420: Enable support for DWC3 controller Vivek Gautam
2014-04-09 11:11 ` Tomasz Figa
2014-04-08 14:36 ` [PATCH V4 4/5] dt: exynos5250: Enable support for generic USB DRD phy Vivek Gautam
2014-04-09 11:11 ` Tomasz Figa
2014-04-08 14:36 ` [PATCH V4 5/5] usb-phy: samsung-usb3: Remove older phy-samsung-usb3 driver Vivek Gautam
2014-04-09 11:13 ` Tomasz Figa
2014-04-09 11:34 ` Vivek Gautam
2014-04-16 13:33 ` Richard Genoud
2014-04-16 14:42 ` Vivek Gautam
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